In the past, a electric steering control apparatus includes a main CPU and a sub CPU that are connected to each other by a data bus, a motor drive circuit that drives a motor in accordance with a drive signal from the main CPU, and a logic circuit that is inserted between the main CPU and the motor drive circuit, wherein the driving direction of the motor is limited by driving the logic circuit to control the passage of a driving direction signal from the main CPU by means of an output signal from the sub CPU (see, for example, a first patent document).
Now, reference will be made to the operation of the conventional apparatus as described in the above-mentioned first patent document.
The main CPU calculates the driving direction of the motor, etc., based on detection signals from various kinds of sensors such as a torque sensor, and sends the calculation result of the motor driving direction to the sub CPU through the data bus.
The sub CPU compares a steering torque signal from the torque sensor and the motor driving direction input from the main CPU with each other, determines, when both of them do not coincide with each other, that the main CPU is in failure (an abnormality occurrence state), and generates an output signal to inhibit the driving of the motor.
[First Patent Document] Japanese patent No. 2915234